1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology, and more particularly, to a semiconductor device for supporting a data bus inversion operation mode.
2. Description of the Related Art
Semiconductor devices including a dynamic random access memory (DRAM) may support a data bus inversion (DBI) operation mode to reduce current consumption generated in data transmission.
For example, in the DBI operation mode, a semiconductor device inverts and transmits a data when the number of bits with a logic low level is greater than that of bits with a logic high level in the data. This is because an amount of current consumption for transmission of a bit with a logic low level is greater than that of a bit with a logic high level when transmission lines for the data transmission are terminated to a source voltage VDDQ.
The data inversion makes the number of bits with a logic low level to be less than a half of the number of total bits of the data when the data is transmitted through the transmission lines.
The semiconductor device may be desirable to delay command and data by a delay time caused in determining the DBI. Such delaying of the command and data guarantees operation reliability of the semiconductor device by compensating for data transmission timing in the DBI operation mode.